Memora8 is a 32-bit processor architecture implemented in the MR8 project. Its instruction set and software conventions are documented here; mr8sim provides a standalone system simulator and can also communicate over UDP with the Verilator emulator or an Artix-7 hardware profile. The current board implementation is a specific single-CPU profile, not a statement that every Memora8 configuration has the same hardware limits.
Memora8 ABI
Memora8 Application Binary Interface Document version: 1.0 Status: Specification Compiler implementation baseline: SekuraJS 6dd5716 This document describes the function-call and data-layout conventions used by the SekuraJS Memora8 backend. It defines how compatible functions exchange scalar arguments and results, preserve registers, and use the stack. It supplements the Memora8 ISA specification; it does not change instruction behavior. Data model Property Convention General-purpose register width 32 bits ABI word size 4 bytes Pointer size 4 bytes Stack alignment at function boundaries 4 bytes Stack direction Grows toward lower addresses The compiler’s integer scalar types are i8, u8, i16, u16, i32, and u32. Their storage sizes and natural alignments are 1, 2, or 4 bytes. Pointers occupy 4 bytes. Structure fields are placed at their natural alignment, and the complete structure size is rounded up to the greatest field alignment. Arrays contain consecutive elements. ...